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#	Item
871	PDF Document Add to Reading List Source URL: www.sigops.org Language: English - Date: 2009-08-10 10:25:13 Computer architecture Multi-core processor UltraSPARC T1 CPU cache Opteron Advanced Micro Devices Cache coherence Multiprocessing Non-Uniform Memory Access Computing Computer hardware Parallel computing
872	PROUDLY SPONSORED BY • AusIndustry • Melbourne Business School • Minter Ellison Lawyers • NICTA • PricewaterhouseCoopers Add to Reading List Source URL: thewarrencentre.org.au Language: English - Date: 2012-05-04 02:43:47 Alcatel-Lucent Bell System NICTA Instruction set architectures Microprocessor Bell Labs AusIndustry Reduced instruction set computing CPU cache Computer hardware Computing Computer architecture
873	HBASE OFFHEAP READ PATH SUPPORT (HBASE[removed]John Anoop S Ramkrishna S Vasudevan (Intel Corporation) Add to Reading List Source URL: issues.apache.org Language: English Computer architecture CPU cache Cache algorithms Cell C dynamic memory allocation BB gun Application programming interface Binary heap HBase Computer memory Cache Computing
874	AMD Sempron Processor Product Data Sheet Add to Reading List Source URL: www.orpheuscomputing.com Language: English - Date: 2009-07-22 06:28:04 X86 architecture Sempron CPU cache X86 DIMM HyperTransport DDR SDRAM Synchronous dynamic random-access memory Advanced Micro Devices Computer architecture Computer hardware Computing
875	November 2009 ® Analysis of IBM System x3850 M2 Performance and Scalability with Add to Reading List Source URL: www.vmware.com Language: English - Date: 2010-01-13 18:25:08 VMware IBM System x Virtual machine CPU cache X86 Symmetric multiprocessing Comparison of platform virtual machines VMware Fusion System software Software Computing
876	MDB: A Memory-Mapped Database and Backend for OpenLDAP Howard Chu Symas Corp., OpenLDAP Project , http://www.symas.com, http://www.openldap.org Add to Reading List Source URL: symas.com Language: English - Date: 2012-07-18 09:11:24 Concurrency control Computer memory Relational database management systems OpenLDAP Cache Multiversion concurrency control CPU cache Berkeley DB Extensible Storage Engine Computing Data management Software
877	Low -Pow e r, H igh-Pe rform a nc e Arc hit e c t ure of t he PWRfic ie nt Proc e ssor Fa m ily Presented by Tse-Yu Yeh Director, Architecture & Verification Hot Chips 18 Add to Reading List Source URL: www.hotchips.org Language: English - Date: 2013-07-27 23:51:47 Computer memory CPU cache Microprocessors Computer hardware PWRficient Computer architecture
878	HC19Chesapeake- A 50Gbps Network Processor and Traffic Manager.v3.ppt Add to Reading List Source URL: www.hotchips.org Language: English - Date: 2013-07-28 00:01:00 Cache CPU cache Throughput Computing Computer hardware Network processor Networking hardware
879	SOAP for High Performance Computing Kenneth Chiu() Madhusudhan Govindaraju () Randall Bramley () Abstract Add to Reading List Source URL: www.extreme.indiana.edu Language: English - Date: 2002-03-14 18:09:16 Remote procedure call Markup languages Web services SOAP CPU cache Web Services Description Language Cache VTD-XML Computing Web standards XML
880	HC19VictoriaFalls - Scaling Highly-Threaded Processor Cores v1.ppt Add to Reading List Source URL: www.hotchips.org Language: English - Date: 2013-07-28 00:02:14 Cache Central processing unit Computer memory Multi-core processor UltraSPARC T1 UltraSPARC T2 Computer hardware Microprocessors CPU cache

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